Question - 1
This unit performs arithmetic logic operations on data values stoered in registers.
- Control unit
- ALU
- Register Set
- Microprocessor
Solutions
Answer- B
Question - 2
Memory unit accessed by content is called
- Read only memory
- Programmable Memory
- Virtual Memory
- Associative Memory
Solutions
Answer- D
Question - 3
The instruction ‘ORG O’ is a
- Machine Instruction
- Pseudo instruction
- High level instruction
- Memory instruction
Solutions
Answer- B
Question - 4
The sequence of operation in CPU is controlled by
- Control Unit
- ALU
- IC
- Memory
Solutions
Answer- A
Question - 5
- Branch and store accumulator
- Branch and save return address
- Branch and shift address
- Branch and show accumulator
Solutions
Answer- B
Question - 6
Control Units are designed using which of the following approach?
- Hardwired approach
- Microprogramming approach
- Both a & b
- None of the above
Solutions
Answer- C
Question - 7
- Multiple instruction multiple data
- Multiple instruction memory data
- Memory instruction multiple data
- Multiple information memory data
Solutions
Answer- A
Question - 8
What is the full form of CMBR?
- Control Memory Buffer Register
- Condition Memory Buffer Register
- Control Memory Biased Register
- Conditional Memory Biased Register
Solutions
Answer- A
Question - 9
The time interval between adjacent bits is called the
- Word-time
- Bit-time
- Turn around time
- Slice time
Solutions
Answer- B
Question - 10
A group of bits that tell the computer to perform a specific operation is known as
- Instruction code
- Micro-operation
- Accumulator
- Register
Solutions
Answer- A
Question - 11
The I/O Devics are also known as
- Framework
- Peripherals
- Firmware
- irmware
Solutions
Answer- B
Question - 12
An instruction pipeline can be implemented by means of
- LIFO buffer
- FIFO buffer
- Stack
- None of the above
Solutions
Answer- B
Question - 13
The mode of data transfer in which sending and receiving units are enabled with same clock is
- Synchronous
- Asynchronous
- Both a & b
- none of these
Solutions
Answer- A
Question - 14
Main measurement of CPU performance is/are
- execution time
- throughput
- both of the above
- none of the above
Solutions
Answer- C
Question - 15
The performance of cache memory is frequently measured in terms of a quantity called
- Miss ratio
- Hit ratio
- Latency ratio
- Read ratio
Solutions
Answer- C
Question - 16
The information available in a state table may be represented graphically in a
- simple diagram
- state diagram
- complex diagram
- data flow diagram
Solutions
Answer- B
Question - 17
Full form of MIPS is _________
- Millions of Instructions per second
- Millions of Issues per second
- Millions of Indexing per second
- Millions of Interrupt per second
Solutions
Answer- A
Question - 18
Full form of MFLOPS is ________
- Millions of Fixed Point Operations Per Second
- Millions of Floating Point Operations Per Second
- Millions of Floating Point Opcodes Per Second
- None of the above
Solutions
Answer- B
Question - 19
Which of the following are parallel computers?
- pipeline computer
- array processor
- multiprocessor system
- All of the above
Solutions
Answer- D
Question - 20
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as
- DDA
- DMA
- BR
- Serial interface
Solutions
Answer- B
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